Altera was founded in 1983 by Robert Hartmann, Michael Magranet, Paul Newhagen, and Jim Sansbury, visionaries who capitalized on the research of the day. They believed that semiconductor customers would benefit from a user-programmable standard product alternative to gate arrays. To address these market needs, Altera's founders pioneered the first reprogrammable logic device, the EP300, giving birth to an entirely new market segment in semiconductors. This new, flexible solution beat traditional standard products to market and launched Altera's reputation as a semiconductor innovation leader.
1983 1984 1987 1988 1989 1992 1995 1996 1997 1998 1999 2000 2001 2002 2004 2005 2006 2007 2011
Table 1 lists major industry innovations in Altera® programmable solutions.
Table 1. Programmable Logic Device (PLD) Industry Innovation Firsts
| Year | PLD Industry Innovation Firsts |
|---|---|
| 2011 | The ability to generate FPGA designs directly from OpenCL programs opens the promise of FPGA-based acceleration to programmers working in this parallel language. |
| 2011 | Integrated optical interfacing: optical fiber transducers inside the chip, allowing direct connection to fiber-optic links eliminates the size, cost, and interface difficulty of external modules. |
| 2007 | First use of parallel algorithms in FPGA placement tools greatly reduced run times for FPGA design tools. |
| 2006 | The ability to generate the design for a computational accelerator block directly from ANSI C code lets users create custom hardware directly from their software. |
| 2006 | Programmable Power: using adjustable substrate bias to select the threshold voltage of logic transistors gives users input to the speed-power tradeoff within blocks. |
| 2005 | Incremental Compilation: users can modify a portion of their design without recompiling the whole thing, gives a huge productivity improvement to design teams. |
| 2004 | The Adaptive Logic Module: a substantially more flexible logic cell, allowing denser, faster, lower-power designs allows users to more fully exploit their silicon. |
| 2002 | SOPC Builder allows users to assemble working systems from pre-verified plug-and-play IP blocks and a standard interconnect scheme. |
| 2002 | DSP blocks embedded in an FPGA: faster, lower-power arithmetic functions using far fewer logic cells opens new high-performance DSP applications to FPGAs. |
| 2001 | HardCopy: the first device able to implement an FPGA design directly in a customer-specific, mass-production chip gives users a clean migration to higher volumes. |
| 2001 | Tool that automatically generates interconnect fabric between blocks in an FPGA: eliminates the need for designers to laboriously connect each pin on each block to form a subsystem. |
| 2001 | High-speed serial transceivers embedded in an FPGA: the ability to connect directly to high-speed channels without external transceivers frees users from evaluating and buying external transceivers. |
| 2000 | First microprocessor fabricated directly on, and fully integrated into, an FPGA die: a high-performance LVDS I/O on an FPGA allows very high-speed digital I/O at substantially lower power. |
| 2000 | First microprocessor fabricated directly on, and fully integrated into, an FPGA die: a high-performance microprocessor interfaced to the FPGA logic fabric gives unprecedented integration and performance with the potential of significant power savings. |
| 2000 | First microprocessor core optimized for implementation in an FPGA logic fabric: users could include a RISC CPU in their designs without external chips. |
| 1999 | Logic analysis embedded into the FPGA: gives users the ability to observe the function of the logic from inside the chip. |
| 1998 | Hierarchical routing topology allows routing tools to exploit the natural organization of the user’s design. |
| 1997 | FPGA configuration via JTAG interface simplifies board design and system initialization. |
| 1996 | First phase-locked loop in an FPGA: the beginning of integrating analog functions onto the FPGA die eliminates delicate external components and clocks. |
| 1995 | Block RAM embedded in an FPGA: large amounts of flexible memory integrated into an FPGA for the first time allows local memory for accelerators and state machines. |
| 1992 | Altera’s first FPGA: a flexible sea of logic elements instead of a structured logic function generator broadens the range of programmable applications. |
| 1989 | First integrated, graphical design environment combines schematic input, compilation, design simulation, and device programming software into a single environment. |
| 1988 | First high-density complex programmable logic device: programmable logic begins the evolution from executing a simple logic function to implementing a subsystem. |
| 1987 | First PLD to include a dedicated I/O bus interface greatly simplifies creation of devices to be attached to a standard bus. |
| 1984 | First reprogrammable logic device. Previous devices could only be programmed once. |
| 1983 | Founding of Altera Corporation. |
