Arria® FPGAs and SoCs deliver optimal performance and power efficiency in the midrange. Arria 10 FPGAs and SoCs reinvent the midrange by delivering higher performance than previous-generation high-end FPGAs while simultaneously reducing power by enabling a comprehensive set of power-saving technologies.
White Paper: Meeting the Power and Performance Imperative of the Zettabyte Era with Generation 10 
White Paper: Expect a Breakthrough Advantage in Next Generation FPGAs
Achieve 15% Higher Performance with Arria 10 FPGAs and SoCs
- 15% higher performance versus the fastest previous generation high-end (60% higher performance versus the previous generation midrange)
- 4X more bandwidth versus the previous generation midrange, including support for 28.05 Gbps transceivers (2X more bandwidth versus previous high-end FPGAs)
- 3X higher system performance (2666 Mbps DDR4, Hybrid Memory Cube support, 1.5 GHz ARM® hard processor system (HPS))
- More than 3300 18x19 multipliers implemented on variable-precision digital signal processing (DSP) blocks
Lower Power by Up to 40% with Arria 10 FPGAs and SoCs
- Smart Voltage ID—Enables devices to run at lower voltage without impacting performance
- VCC PowerManager—Use fast speed-grade devices to choose between higher performance or lower total power with different operating voltages
- Low Static Power Grades—Select devices lowering max static power
- Programmable Power Technology—Enables lower power transistors for non-performance critical paths to reduce static power
Save Board Space and Capital Expenditures by Integrating More with Arria 10 FPGAs and SoCs
- Extensive SoC variants with dual-core ARM Cortex-A9 HPS
- 2X more density versus the previous generation midrange with over 1 million logic elements (LEs)
- Integrated hard Intellectual Property (IP) such as DDR memory controllers and PCI Express® (PCIe®) 3.0 specification (Gen3)
- Complementary Enpirion Power SoCs will offer customers higher performance, lower system power, higher reliability, smaller footprint and faster time-to-market to power Arria 10 FPGAs and SoCs
Maximize Your Productivity and Increase Time-to-Market with Altera’s Innovative Quartus II Software
- Fastest compile times in the industry
- C-based design entry using the Altera SDK for OpenCLTM, offering a design environment that is easy to implement on FPGAs
- System-level design environment with Qsys System Integration Tool
- DSP Builder - a model-based DSP environment within the MATLAB/Simulink environment
Table 1. Arria 10 Variants
| Variant | Description |
|---|---|
| Arria 10 GT | FPGAs enabled with up to 96 full-duplex transceivers with data rates up to 28.05 Gbps chip-to-chip, 17.4 Gbps backplane and up to 1150K equivalent LEs |
| Arria 10 GX | FPGAs enabled with up to 96 full-duplex transceivers with data rates up to 17.4 Gbps chip-to-chip, 16.0 Gbps backplane, and up to 1150K equivalent LEs |
| Arria 10 SX | SoCs enabled with a dual-core ARM CortexTM-A9 HPS, up to 48 full-duplex transceivers with data rates up to 17.4 Gbps chip-to-chip, 16.0 Gbps backplane, and up to 660K equivalent LEs |
Figure 1: Architecture of Arria 10 FPGA
Arria 10 FPGAs and SoCs are ideal for a broad array of applications such as wireless, wireline, military, broadcast and other end markets.
Related Links
- White Paper: Meeting the Power and Performance Imperative of the Zettabyte Era with Generation 10 (PDF)
- White Paper: Expect a Breakthrough Advantage in Next Generation FPGAs (PDF)
- Press Release: Altera Announces Breakthrough Advantage with Generation 10 FPGAs and SoCs
- Get Started
- Family Overview
- Application Examples
- Transceiver Options and Benefits
- Arria 10 Advance Information Brief (PDF)
