Altera® SPICE kits enable you to perform system-level simulations for various configurations that make use of Altera devices. The SPICE kits provide models that support a wide variety of I/O features across process, voltage, and temperature (PVT). Each SPICE kit contains the following information:
- Encrypted transistor and logic cell library models
- Encrypted input/output buffer circuit models for single-ended and differential I/O
- Single-ended and differential sample SPICE decks
- User guide describing the model usage
Table 1 explains the File Revision Numbering Convention used for downloadable device models on this page.
| Table 1. Altera Device Models File Revision Numbering Convention | |
| File Revisions | Description |
| 0.x silicon and file in development 1.x pre-silicon file data from silicon model only |
The models are designated as "Preliminary" and have not been correlated against physical device operation. |
| 2.x file correlated to actual silicon measurements | The models are designated as "Correlated" and have been correlated against physical device operation. |
| 3.x mature product, no more changes likely | The models are designated as "Final" and have been correlated against physical device operation. There will not be any planned changes to the models. |
| Table 2a. Altera Device Models for General purpose IOs and LVDS pins | |||||
| Device Family | Part Number Prefix |
Device Model Type |
Device Model | Model Revision |
Last Models Update |
|---|---|---|---|---|---|
| Arria V GX/GT | 5AGX, 5AGT | I/O—Synopsys HSPICE | AV_Prelim_GPIO_model_v0p3.zip | 0.3 | 05/2013 |
| Arria II GZ | EP2AGZ | I/O—Synopsys HSPICE | arria2gz_io_hspice_model_kit.zip | 3.0 | 12/2010 |
| Arria II GX | EP2AGX | I/O—Synopsys HSPICE | arria2gx_io_hspice_models_kit.zip | 3.0 | 12/2009 |
| Cyclone V | 5C | I/O—Synopsys HSPICE | CV_Prelim_GPIO_model_v0p3.zip | 0.3 | 06/2013 |
| Cyclone IV | EP4CGX | I/O—Synopsys HSPICE | cyclone4_io_hspice_model_v1p0.zip | 1.0 | 10/2010 |
| Cyclone III | EP3C | I/O—Synopsys HSPICE | cyclone3_io_hspice_models_kit.zip | 1.0 | 03/2008 |
| Cyclone II | EP2C | I/O—Synopsys HSPICE | cyclone2_i/o_hspice_models_kit.zip | 3.0 | 01/2006 |
| Cyclone® | EP1C | I/O—Synopsys HSPICE | cyclone_i/o_hspice_models_kit.zip | 1.1 | 04/2003 |
| HardCopy II | HC2 | I/O—Synopsys HSPICE |
hardcopy2_i/o_hspice_models_kit.zip |
1.0 | 02/2007 |
| HardCopy® Stratix® | HC1S | I/O—Synopsys HSPICE | hardcopy_stratix_i/o_hspice_models_kit.zip | 1.0 | 05/2004 |
| MAX V | 5M | I/O—Synopsys HSPICE | max5_io_hspice_model_kit.zip | 1.0 | 12/2010 |
| MAX® II | EPM | I/O—Synopsys HSPICE | max2_i/o_hspice_models_kit.zip | 2.0 | 12/2004 |
| Stratix V | 5S | I/O—Synopsys HSPICE | stratix5_IO_hspice_model_v1p0.zip | 1.0 | 04/2013 |
| Stratix IV | EP4S | I/O—Synopsys HSPICE | stratix4_io_hspice_models.zip | 1.0 | 12/2009 |
| Stratix III | EP3S | I/O—Synopsys HSPICE | stratix3_i/o_hspice_models_kit.zip | 1.0 | 04/2008 |
| Stratix II GX | EP2SGX | I/O—Synopsys HSPICE | stratix2gx_io_hspice_models_kit.zip | 1.0 | 08/2006 |
| Stratix II | EP2S | I/O—Synopsys HSPICE | stratix2_i/o_hspice_models_kit.zip | 4.0 | 12/2005 |
| Stratix GX | EP1SGX | I/O—Synopsys HSPICE |
stratix_i/o_hspice_models_kit.zip (Stratix GX FPGAs have the same HSPICE model as Stratix FPGAs) |
1.2 | 01/2003 |
| Stratix | EP1S | I/O—Synopsys HSPICE | stratix_i/o_hspice_models_kit.zip | 1.2 | 01/2003 |
To download device models, please read the licensing terms and conditions mentioned above.
| Table 2b. Altera Device Models for Transceiver pins | |||||
| Device Family | Part Number Prefix |
Device Model Type |
Device Model | Model Revision |
Last Models Update |
|---|---|---|---|---|---|
| Arria V GZ | EP5AGZ |
Transceiver—Synopsys HSPICE |
arria5gz_hssi_hspice_models_v1p0.zip | 2.0 | 09/2012 |
| Arria II GX | EP2AGX | Transceiver—Synopsys HSPICE | arria2gx_hssi_hspice_models_v1p0.zip | 2.0 | 01/2011 |
| Arria® GX | EP1AGX | Transceiver—Synopsys HSPICE | arriagx_hssi_hspice_models_kit.zip | 3.0 | 04/2008 |
| Stratix V GX/GS | EP5SGX, EP5SGS | Transceiver—Synopsys HSPICE | stratix5gx_hssi_hspice_models_v1p0.zip | 2.0 | 09/2012 |
| Stratix V GT | EP5SGT |
Transceiver—Synopsys HSPICE |
s5gt_EAP_hssi_hspice_model_v0p1.zip | 1.0 | 07/2013 |
| Transceiver—IBIS-AMI | stratix5gt_EAP_hssi_ibis_ami_models_v0p2.zip | 1.0 | 07/2013 | ||
| Stratix IV GT | EP4SGT | Transceiver—Synopsys HSPICE | stratix4gt_hssi_hspice_models_kit.zip | 3.0 | 12/2009 |
| Transceiver—IBIS-AMI |
stratix4gt_Preliminary_hssi _ibis_ami_models_v0p5.zip |
3.0 | 07/2013 | ||
| Stratix IV GX | EP4SGX | Transceiver—Mentor Hyperlynx | stratix4gx_hssi_eldo_model_v1p0.zip | 1.0 | 01/2010 |
| Transceiver—Synopsys HSPICE | stratix4gx_hssi_hspice_models_kit.zip | 3.0 | 12/2009 | ||
| Transceiver—Agilent ADS | stratix4gx_hssi_ads_models_kit.zip | 3.0 | 12/2009 | ||
| Transceiver—IBIS-AMI |
stratix4gx_Preliminary_hssi _ibis_ami_models_v0p6.zip |
3.0 | 07/2013 | ||
| Stratix II GX | EP2SGX | Transceiver—Mentor Hyperlynx | s2gx_mgc_kit_a1_5_for_HL77_and_HL80.zip | 1.1 | 10/2010 |
| Transceiver—Agilent ADS | Stratix_II_GX_Ver1_01_user.zip | 1.1 | 07/2008 | ||
| Transceiver—Cadence Allegro PCB SI | Cadence_SIIGX_Kit_0p3.zip | 1.0 | 01/2008 | ||
| Transceiver—Synopsys HSPICE | stratix2gx_hssi_hspice_models_kit.zip | 3.0 | 03/2007 | ||
| Stratix GX | EP1SGX | Transceiver | Please contact your Altera support representative to obtain the transceiver models |
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