Altera and its partners develop and deliver reference designs that show efficient solutions for common system design problems.
Refer to the Design Examples section for additional examples of code to help you address your design needs.
Available reference designs can be found in the table below. Click the link in the Product Name column to navigate to the product page for more details. Use the navigation on the left to list IP by function, or use the search box on the main Intellectual Property page to search product descriptions and keywords for IP and reference designs.
Product Name
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Supported Devices | Qsys Compliant ![]() ![]() |
Provider ![]() ![]() |
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10 Gbps Ethernet Hardware Demonstration Reference Design
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Altera |
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- | Altera | |
3GPP LTE Turbo Decoder Reference Design
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- | Altera |
3GPP UMTS Turbo Decoder Reference Design
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- | Altera |
4K Upscaling Video Conversion Reference Design
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- | Altera |
Active Parallel Remote Update Reference Design
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- | Altera |
ADI Parallel Port SDRAM Controller Reference Design
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- | Altera |
Automotive Digital Radar Reference Design
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- | - | Altera |
Control Plane Bridge Reference Design
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- | Quasar Systems, Inc. |
Crest Factor Reduction Reference Design
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- | - | Altera |
DFT/IDFT Reference Design for 3GPP LTE
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- | Altera |
Drive-on-a-Chip Motor Control Reference Design
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Altera |
DTMB Reference Design
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- | Tsinghua University |
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- | PLDA | |
Format Conversion Reference Design
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- | Altera |
Format Conversion Reference Design V2
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- | Altera |
FPGA Design Security Solution Using Secure Memory Device Reference Design
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- | Altera |
FPGA Design Security Using MAX II
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- | Altera |
High Definition Video (UDX) Reference Design
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Altera |
I2C Controller Reference Design
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- | Microtronix Inc. |
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- | Pleora Technologies | |
Media Independent Interface Reference Design
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- | MaCo-Engineering |
Multi-output scaler
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Altera |
PCI Express Avalon-MM High Performance DMA Reference Design
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Stratix V |
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Altera |
PCI Express Avalon-ST High Performance Reference Design
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- | Altera |
PCI Express to External Memory Reference Design
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Altera |
PCI to Local Bridge Reference Design
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- | Dexcel Electronics Designs |
QR Matrix Decomposition Reference Design
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- | Altera |
SDI PCIe Bridging Reference Design
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- | Omnitek |
Serial RapidIO to PCI Bridge Reference Design
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- | Jennic Ltd |
Serial RapidIO to TI 6482 DSP Reference Design
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- | Altera |
Serial RapidIO to TI 6488 DSP Reference Design
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- | Altera |
Single-Port Triple-Speed Ethernet and On-Board PHY Chip Reference Design
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Altera |
SPI4.2 to XAUI Bridge Reference Design
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- | Octera |
TFT LCD Controller Reference Design
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Digital Blocks |
Triple Rate SDI Reference Design
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- | Altera |
VGA Controller and Nios II Reference Design
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- | Altera |
Video Over IP Reference Design
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- | Altera |
Video Processing Reference Design
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Altera |
WCDMA DUC and DDC Reference Designs
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- | Altera |
WiMAX DUC and DDC Reference Designs
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- | Altera |
XS4 10 Gigabit Ethernet and HiGig SPI4.2 Bridge
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- | MorethanIP |
The use of Altera’s Qsys and SOPC Builder components, intellectual property cores, and reference designs is governed by, and subject to, the terms and conditions of the Altera Program License Subscription Agreement, the Altera MegaCore Function License Terms and Conditions, and the Altera Hardware Reference Design License Agreement respectively.