Qsys - Altera’s System Integration Tool

• Easy-to-use GUI interface enables quick integration between IP functions and subsystems
• Automatic generation of interconnect logic (address/data bus connections, bus width matching logic, address decoder logic, arbitration logic, etc.)
• Availability of plug-and-play Qsys-compliant IP from Altera and IP partners
• Support mixing of different industry-standard interfaces including Avalon^®,ARM^® AMBA^® AXI^TM, AMBA APB^TM, and AMBA AHB^TM interfaces
• Automatic hardware description language (HDL) generation of your system
• Hierarchical design flow enables scalable designs, team-based design, and maximizes design reuse (view demo)
• Migration flow to Qsys for SOPC Builder designs (view demo)

• High-performance Qsys interconnect based on the NoC architecture and automatic pipelining delivers up to 2X higher performance compared to SOPC Builder’s system interconnect fabric (view demo)
• Ability to control the aggressiveness of automatic pipelining to meet f_MAX and latency system requirements

• Ability to start your simulation faster with automatic testbench generation and by using the verification IP suite (view demo)
• Faster board bring-up with System Console by sending read and write transactions into a live system (view demo)

• White paper: Applying the Benefits of Network on a Chip Architecture to FPGA System Design (PDF)
• Qsys-compliant IP
• System Console for real-time debug of your Qsys system

• Complete Qsys tutorial design example
• Read AN632: SOPC Builder to Qsys Migration Guidelines (PDF) and the Quartus^® II software release notes (PDF)
• Register for a Qsys training class
• View Qsys reference designs
• View technical support and documentation
• Download Quartus II software (includes Qsys)

Conquer FPGA Design Complexity with System-Level Integration

• Learn how Qsys can improve your productivity, saving you valuable development time in your next and future FPGA designs.

View webcast

5 Reasons to Switch from SOPC Builder to Qsys

• Learn about the advantages of Qsys compared to SOPC Builder
• Learn how to migrate your SOPC Builder designs to Qsys

View webcast

Easily Create PCIe-Based Designs for FPGAs

• Learn how easy it is to build a PCIe-based design using Qsys
• Learn about the advantages of the optimized PCI Express^® (PCIe^®) memory-mapped IP core

View webcast

AMBA AXI and Altera Avalon interoperation using Qsys 

See how seamless it is to integrate IP components with AMBA AXI interfaces with Altera Avalon interfaces using Qsys.

View demo 

Increase Interconnect Performance with Qsys

• See how you can improve the performance of the Qsys interconnect with automatic register pipelining.

Design a Hierarchical System with Qsys

• See how you can build large systems using a team-based design flow.
• Learn how to build large systems using subsystems.

• See how to migrate your SOPC Builder designs to Qsys
• Learn about the migration resources available

• See how to automatically generate a testbench
• Learn about the available verification IP suite

• See how you can debug your system in real time with System Console
• Learn how to bring up your board faster using address-based read and write transactions

Faster Board Bring-Up with System Console

• See how you can bring up your board faster with a few simple checks
• Learn how to quickly isolate issues by checking your system’s resets and clocks, and by performing simple address-based read and write transactions

 View demo

Building a Custom GUI with System Console

• See how you can build your own custom GUI to debug and monitor your system
• Learn how to add different graphical elements to control and monitor your system

 View demo