Although DDR SDRAM is now the lowest cost memory type available, SDR SDRAM is still being used today.
Altera and its partners provide complete system solutions, including technical collateral, software support, demo boards, intellectual property (IP) cores, and reference designs to help you successfully interface Altera® FPGAs to SDR memories. Table 1 lists SDR SDRAM memory interface performance support in Altera FPGAs.
| Table 1. SDR SDRAM Memory Interface Performance Support | |
| Device | SDR SDRAM Interface Performance |
|---|---|
| Stratix® II | 200 Mbps (200 MHz) |
| Stratix II GX | 200 Mbps (200 MHz) |
| Stratix | 167 Mbps (167 MHz) |
| Stratix GX | 167 Mbps (167 MHz) |
| Cyclone® | 133 Mbps (133 MHz) |
| APEX™ II | 167 Mbps (167 MHz) |
Technical Documentation
Altera offers technical collateral that contains device support information for SDR memory interfaces, as shown in Table 2.
| Table 2. SDR SDRAM Technical Documentation | |
| Device Handbooks | Applicable Devices |
|---|---|
| Stratix II Device Handbook: External Memory Device Interfaces (PDF) chapter Using Selectable I/O Standards (PDF) chapter |
Stratix II |
| Stratix II GX Device Handbook: External Memory Device Interfaces (PDF) chapter Using Selectable I/O Standards (PDF) chapter |
Stratix II GX |
| Stratix Device Handbook or Stratix GX Device Handbook: External Memory Device Interfaces (PDF) chapter Using Selectable I/O Standards (PDF) chapter |
Stratix and Stratix GX |
| Cyclone Device Handbook: External Memory Device Interfaces (PDF) chapter Using Selectable I/O Standards (PDF) chapter |
Cyclone |
| White Papers | Applicable Devices |
| Selecting the Right High-Speed Memory Technology for Your System (PDF) | All |
Software Support and Tools
Altera offers software support and tools that aid in the SDR SDRAM memory interface design process, as shown in Table 3.
| Table 3. SDR SDRAM Software Support and Tools | |
| Feature | Applicable Devices |
|---|---|
| Stratix IBIS Models | Stratix |
| SPICE Models for Stratix I/O Buffers (Contact Altera or local Altera field applications engineer (FAE)) |
Stratix |
| SPICE Models for Stratix GX I/O Buffers (Contact Altera or local Altera FAE) |
Stratix GX |
IP Cores and Reference Designs
Altera offers a free SDR SDRAM reference design for APEX II, Stratix, Stratix GX, and Cyclone devices. In addition, SDR SDRAM controller IP cores are available from Altera Megafunction Partners Program (AMPPSM) partners at the
Development Kits and Hardware Reference Platforms
Altera offers demo boards that enable you to implement and test SDR SDRAM memory interfaces. Table 5 lists the demo boards available for SDR memory interfaces.
| Table 5. SDR SDRAM Development Kits and Hardware Reference Platforms | |
| Board Name | Device Families Supported |
|---|---|
| Nios Development Kit, Stratix II Edition | Stratix II |
| DSP Development Kit, Stratix II Edition | Stratix II |
SDR SDRAM Memory Vendors
Related Links
- External Memory Device Interfaces in Stratix II, Stratix II GX, Stratix, and Stratix GX FPGAs
- External Memory Device Interfaces in Cyclone II and Cyclone FPGAs
- External Memory Interface Support in APEX II Devices
- Device Support Center (Signaling and Board Design)
